linear integrated circuit 2 a bsolute maximum ra t ings characteristi c sy mbol value unit supply volt age vc c 2 2 v differential input voltage v i(diff) 18 v pow er d is sipation p d 400 m w input voltage v i 15 v operating temperature t opr 0~+70 c storage temperature t stg -65~+150 c e l e c tric al c haracteristics ( ta=25 c ,vcc=15v , vee=-15v) characteristic symbol test condition min typ. max unit supply current icc 3.5 5.6 ma input offset vol tage v io rs<10k ? 2 6 mv input offset c urrent i io 5 200 na input bias current i bias 30 500 na large signal voltage gai n gv vo(p-p)=10v,r l <2k ? 20 200 v/mv commom mode i nput voltage range v i(r) 12 13 v commom mode rejec t ion ratio cmrr rs<10k ? 70 90 db supply volt age rej ection ratio psrr rs<10k ? 76 90 db output voltage s w ing vo(p-p) r l >10k ? 12 14 v power comsumpt i on pc 70 170 mv slew rate sr vi=10v,r l >2k ? ,c l <100pf 1.2 v/ s rise tim e t ris vi=20mv,r l >2k ? , c l <100pf 0. 3 s overshoot os vi=20m v ,r l >2k ? ,c l <100pf 15 % YG4558/e/l
linear integrated circuit 3 typical pe r formance characteristics 10 10 2 10 36 10 fig.3 pow er bandwith(large signal swing vs frequency) output voltage ( v ) frequency (hz ) 10 4 10 5 0 4. 0 8. 0 12. 0 16. 0 20. 0 24. 0 28.0 32.0 fig.1 pos itive output voltage swing vs load resistance load resistance ( ? ) 10 2 10 4 10 5 10 3 1.0 3.0 5.0 9. 0 11.0 13.0 15.0 7.0 output volt age (peak) (v) fig.2 pos itive output voltage swing vs load resistance output voltage ( peak ) (v) load resis t ance ( ? ) 10 2 10 4 10 5 10 YG4558/e/l
linear integrated circuit 3 typical per f ormance characteristics 10 10 2 10 36 10 fig.3 power bandw ith(large signal swing vs frequency) output voltage (v ) frequency (hz) 10 4 10 5 0 4. 0 8. 0 12. 0 16. 0 20. 0 24. 0 28. 0 32.0 fi g.1 posit ive output voltage swing vs load resistan ce load resistance ( ? ) 10 2 10 4 10 5 10 3 1.0 3.0 5.0 9.0 11. 0 13.0 15.0 7.0 output voltage ( peak) (v) fi g.2 posit ive output voltage swing vs load
linear integrated circuit 4 0 20 40 60 80 100 120 140 fig. 7 spectral n o ise density input nois e(nv /hz) frequency hz) 10 100 10 5 10 3 10 4 10 6 gv=10 rs=100k ? 10 10 2 10 36 10 10 -1 1 10 fig. 6 output no i se vs rs output no i se(rms) (mv) rs ( ? ) 10 4 10 5 10 -2 gv=1000 gv=100 gv=10 gv=1 10 10 2 10 3 6 10 fig. 4 burs t noise vs rs input noise(peak ) (mv ) rs ( ? ) 10 4 10 5 1 10 10 2 10 3 bw=1.0 hz to 1.0khz 10 10 2 10 2 6 10 fig. 5 rms noise vs rs input noi se(rms) ( v) rs ( ? ) 10 4 10 5 0.1 1 10 10 3 0 20 40 60 80 100 120 140 fig. 8 open loop frequency res pons e frequency hz) avd ( db) -20 10 100 10 5 10 3 10 4 10 6 11 0 7 10 100 10 5 10 3 10 4 10 6 11 0 7 frequency hz ) fig. 9 phase m a rgin vs frequency phase margin 0 20 40 60 80 100 120 140 160 180 YG4558/e/l
linear integrated circuit 5 package dimensio ns di p-8-300-2. 54 sop-8-225-1.27 YG4558/e/l
linear integrated circuit 6 sip-8-2.54 unit: mm YG4558/e/l
linear integrated circuit 7 attach revision history data rev des c ription page 1.0 original 2003.10.23 1.1 add ?or edring information? 1 c hange ?u t c4558 t o u tc4558/e? 1 2005.3.17 1.2 rev is e ?package dimensions? 5 2009.11.10 1.3 add?sip-8-2.54? 1, 6 YG4558/e/l
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